The implementation of CRAPS processor on Nexys 3 FPGA Board is done firstly by synthesizing on Xilinx ISE sofware the VHDL sources modeling its operating. You can find here these sources and the "User Constraint File" (UCF) (specific to the Nexys 3 Board) :

• vhdl_craps.tar


• nexys3_craps.ucf

Once the synthesizing is completed, we get a binary file (.bit for volatile memory or .mcs for EEPROM) that we load on FPGA Board. Here is the .mcs file for Nexys 3 :

• Craps_Nexys3.mcs

Now we use a monitor written in Java which allows to interact in real time with the CRAPS processor. This program is using native functions in C++ (see JNI), itself calling the low-level functions of the Dcputil library. This monitor can be downloaded here :

• CrapsMon4.6.jar

To run this application on Windows, we need the following dll :

• usbComm1.3.dll

To run it on Linux (tested on x86_64 Debian 6.0), we need this dynamic library :

• libusbComm1.3.so

this latter library is got via JNI with these files :

• usbComm1.3.cpp


• org_jcb_shdl_CommThread.h

For generating the .so library on 64 bits Linux, here are the compilation commands to execute :